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Configuration Error Handling
SV51010
2014.01.10
Configuration Error Handling
To restart configuration automatically, turn on the Auto-restart configuration after error option in the
General page of the Device and Pin Options dialog box in the Quartus II software.
If you do not turn on this option, you can monitor the nSTATUS pin to detect errors. To restart configuration,
pull the nCONFIG pin low for at least the duration of t CFG .
Related Information
Stratix V Device Datasheet
Provides more information about t STATUS and t CFG timing parameters.
Initialization
The initialization clock source is from the internal oscillator, CLKUSR pin, or DCLK pin. By default, the internal
oscillator is the clock source for initialization. If you use the internal oscillator, the Stratix V device will be
provided with enough clock cycles for proper initialization.
Note: If you use the optional CLKUSR pin as the initialization clock source and the nCONFIG pin is pulled
low to restart configuration during device initialization, ensure that the CLKUSR or DCLK pin continues
toggling until the nSTATUS pin goes low and then goes high again.
The CLKUSR pin provides you with the flexibility to synchronize initialization of multiple devices or to delay
initialization. Supplying a clock on the CLKUSR pin during initialization does not affect configuration. After
the CONF_DONE pin goes high, the CLKUSR or DCLK pin is enabled after the time specified by t CD2CU . When
this time period elapses, Stratix V devices require a minimum number of clock cycles as specified by T init to
initialize properly and enter user mode as specified by the t CD2UMC parameter.
Related Information
Stratix V Device Datasheet
Provides more information about t CD2CU , t init , and t CD2UMC timing parameters, and initialization clock
source.
User Mode
You can enable the optional INIT_DONE pin to monitor the initialization stage. After the INIT_DONE pin is
pulled high, initialization completes and your design starts executing. The user I/O pins will then function
as specified by your design.
Device Configuration Pins
Configuration Pins Summary
The following table lists the Stratix V configuration pins and their power supply.
Note: The TDI , TMS , TCK , TDO , and TRST pins are powered by V CCPD of the bank in which the pin resides.
Note: The CLKUSR , DEV_OE , DEV_CLRn , DATA[31..1] , and DATA0 pins are powered by V CCPGM during
configuration and by V CCIO of the bank in which the pin resides if you use it as a user I/O pin.
Altera Corporation
Configuration, Design Security, and Remote System Upgrades in Stratix V Devices
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